Architecture
Six paradigms.
Four blocks.
One die.
Every form of computation that exists fits into six paradigms. The TESilicon architecture implements all of them on a single die — through four physical compute blocks that share memory, energy, and control.
The Six Paradigms
Every computation, accounted for.
There is no seventh.
Sequential scalar
Control flow. Branching. The if/else.
Parallel matrix
Linear algebra. The multiply-accumulate.
Reconfigurable dataflow
Programmable routing between compute elements.
Event-driven async
No clock. Fires on threshold.
Processing-in-memory
Compute where the data lives.
Bit-serial stochastic
Probabilistic streams. Graceful precision.
The Four Blocks
Compute, in physical form.
RISC-V Core Complex
The brain. Sequential scalar. Runs the OS, the network stack, the control flow. Schedules every other block.
Systolic Array
The workhorse. Parallel matrix. Dense inference, batch math, signal processing.
Reconfigurable Fabric
The future-proofing. Reconfigurable dataflow plus processing-in-memory. The block that determines the variant.
Spiking / Stochastic Array
The sentinel. Event-driven and bit-serial stochastic in one block. Always on. Wakes the rest of the chip when something matters.
Two Variants
Same architecture. Two reconfigurable fabrics.
Same RISC-V. Same systolic array. Same spiking sentinel. The difference is one block.
Joule CGRA
Coarse-grained reconfigurable array. Word-level processing elements that switch between dataflow graphs in microseconds.
Joule DLRA / RRA
Domain-level reconfigurable array with reversible computing capability. Tile types compose into seven execution units at runtime. Reversible mode approaches the thermodynamic floor.
Shared
Everything else is the same.
Unified memory
Every block sees the same physical address space. Zero-copy data sharing.
On-die NVM
RRAM for boot, weights, application storage. Most workloads need no external memory.
Five radios
WiFi, BLE, LoRa, UWB, GNSS. All on-die.
Post-quantum security
Hardware root of trust. PQC accelerators. Secure boot from day one.
Energy harvesting
Solar, thermal, RF, vibration, humidity. Integrated PMU. Deploy and forget.
Made in America
Zero ships on SKY130A via ChipFoundry. Production roadmap moves to 28 nm FD-SOI on a US-fabricated process.
Three modules. Same architecture.
The same Zero die ships in three modules — self-powered edge node, castellated OEM module, and CXL datacenter module — for different deployment needs.